1) Field of the Invention
This invention relates generally to fabrication of semiconductor devices and more particularly to the fabrication of a Co-Planar Wave guide (wiring metal) in a conventional CMOS process and more particularly to Lossless Co-Planar Wave guide (CPW) in CMOS Process.
2) Description of the Prior Art
Conventional devices have the signal lines (e.g., microwave microstrip lines) near the silicon substrate. The signal lines generate e-fields near the substrate that are a problem. Due to the Si-substrate's characteristic (loosy) to dissipate energy (from the e-fields), it is difficult to fabricate a microwave microstrip line (or signal line) in the conventional CMOS process.
The importance of overcoming the various deficiencies noted above is evidenced by the extensive technological development directed to the subject, as documented by the relevant patent and technical literature. The closest and apparently more relevant technical developments in the patent literature can be gleaned by considering U.S. Pat. No. 5,571,740 (Peterson) shows a capped microwave circuit with a standard ground plane layer.
U.S. Pat. No. 5,256,996 (Marshand et al.) shows a coplanar strip process.
U.S. Pat. No. 4,587,541 (Dalman et al.) teaches a method for a coplanar wave guide.